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China’s push for chip independence continues with its first RISC-V server CPU
(www.tomshardware.com)
this post was submitted on 03 Apr 2025
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Do you have any resources by any chance that explain the difference well?
I work in high level software, so understand the benefit of doing things at ide time vs compile time vs runtime, and I've coded in assembly back in the day and understand instruction sets at a very rough level, but I'm not really familiar with specifically what differentiates RISC / ARM / x64, or why RISC's reductions would be good / bad / what trade-offs come with them.
between the 30k' overview of Reduced instruction set computer (RISC) architecture and the lower level RISC-V Architecture: A Comprehensive Guide to the Open-Source ISA, you should get a pretty decent feel for it.
the level of optimization you get via hardware and software tooling is honestly pretty spectacular. I have been waiting for RISC to come out of hiding for years and it seems to be happening.