this post was submitted on 23 Oct 2024
746 points (99.0% liked)

Technology

60052 readers
2851 users here now

This is a most excellent place for technology news and articles.

Our Rules

  1. Follow the lemmy.world rules.
  2. Only tech related content.
  3. Be excellent to each another!
  4. Mod approved content bots can post up to 10 articles per day.
  5. Threads asking for personal tech support may be deleted.
  6. Politics threads may be removed.
  7. No memes allowed as posts, OK to post as comments.
  8. Only approved bots from the list below, to ask if your bot can be added please contact us.
  9. Check for duplicates before posting, duplicates may be removed

Approved Bots

founded 2 years ago
MODERATORS
[email protected]
[email protected]
[email protected]
[email protected]
[email protected]
746
REPORT: Arm is sensationally canceling the license that allowed Qualcomm to make Snapdragon chips which power everything from Microsoft's Copilot+ PCs to Samsung's Galaxy smartphones and tablets (www.windowscentral.com)
submitted 2 months ago by [email protected] to c/[email protected]
212 comments fedilink hide all child comments
you are viewing a single comment's thread
view the rest of the comments
[–] [email protected] 2 points 1 month ago (1 children)

And it does not concern you that this RVA profile is version 23

Not sure where you got that information. There are only 5 RISC-V profiles.

And they are incompatible, with version 23 because they lack instructions?

Like all the x86 CPUs from a few years ago that don’t have all the new extensions? Not supporting new extensions doesn’t mean the CPU is useless, only that it’s worse than new ones, as things should be when there’s progress. Or I guess you throw out your x86 CPU every time Intel/AMD create a new instruction?

So a compiler would have to support at least a certain number of those profiles

Do you think compilers only target one x86 version with one set of instructions? For example in x86, there’s SIMD versions SSE, SSE2, SSE3, SSSE3, SSE4, SSE4.1, SSE4.2, compilers support all of them, and that’s literally just for the SIMD instructions. What’s new?

[–] [email protected] 1 points 1 month ago (1 children)

Yes, there are differences in certain x86 command sets. But they actually have a market. RISC-V is just a niche, and splintering in a small niche is making the support situation worse.

[–] [email protected] 1 points 1 month ago

making the support situation worse

The support situation is so bad that both GCC and LLVM have extensive for RISC-V.