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Microsoft says “Prism” translation layer does for Arm PCs what Rosetta did for Macs (arstechnica.com)

submitted 5 months ago by [email protected] to c/[email protected]

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[–] [email protected] 3 points 5 months ago (1 children)

Here is a great article on the topic. Basically, x86 spends a comparatively enormous amount of energy ensuring that its strong memory guarantees are not violated, even in cases where such violations would not affect program behavior. As it turns out, the majority of modern multithreaded programs only occasionally rely on these guarantees, and including special (expensive) instructions to provide these guarantees when necessary is still beneficial for performance/efficiency in the long run.

For additional context, the special sauce behind Apple’s Rosetta 2 is that the M family of SoCs actually implement an x86 memory model mode that is selectively enabled when executing dynamically translated multithreaded x86 programs.

[–] [email protected] 1 points 5 months ago

Thanks for the links, they're really informative. That said, it doesn't seem to be entirely certain that the extra work done by the x86 arch would incur a comparatively huge difference in energy consumption. Granted, that isn't really the point of the article. I would love to hear from someone who's more well versed in CPU design on the impact of it's memory model. The paper is more interesting with regards to performance but I don't find it very conclusive since it's comparing ARM vs TSO on an ARM processor. It does link this paper which seems more relevant to our discussion but a shame that it's paywalled.