this post was submitted on 19 Nov 2023
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So, much as I hate to admit it, the real reason for this is bandwidth. Lets look at the best case scenario without dipping our toes into server grade hardware. AMD CPUs tend to have more I/O bandwidth allocated than Intel, so we'll take the top of the line desktop AMD CPU as of right now, the Ryzen 9 7950X (technically the X3D version is the actual top of the line, but that makes certain tradeoffs and for our purposes in this discussion both chips are identical).
On paper, the 7950X has 24 PCIe 5.0 lanes, and 4 on board USB 3.2 ports on its built in USB controller. So already we could have a maximum of 4 type-C ports if we had no type-A ports, however in practice most manufacturers opt to split the difference and go with 1 or 2 type-C ports and the remaining 2 or 3 ports as type-A. You can have more USB ports of course, but you need to then include a USB controller on your motherboards chipset, and that in turn needs to be wired into the PCIe bus which means taking up PCIe lanes, so lets take a look at the situation over there.
We start with 24 PCIe lanes, but immediately we're going to be sacrificing 16 of those for the GPU, so really we have 8 PCIe lanes. Further, most systems now use NVMe M.2 drives, and NVMe uses up to 4 PCIe lanes at its highest supported speed. So we're now down to 4 PCIe lanes, and this is without any extra PCIe cards or a second NVMe drive.
So, now you need to plug a USB controller into your PCIe bus. USB 3.2 spec defines the highest supported bandwidth as 10 Gbps. PCIe 5.0 defines the maximum bandwidth of a single PCIe lane as a bit over 31 Gbps. So the good news is, you can successfully drive up to 3 USB 3.2 ports off a single PCIe 5.0 lane. In practice though USB controllers are always designed with even numbers of ports, typically 2 or 4. In the case of 4, one lane isn't going to cut it, you'll need at least 2 PCIe lanes.
I think you can see at this point why manufacturers aren't in a huge rush to slap a ton of USB type-c connectors on their motherboards. With a modern desktop there's already a ton of devices competing for limited CPU I/O bandwidth. Even without an extra USB controller added in it's already entirely feasible to come dangerously close to completely saturating all available bandwidth.
Isn't this glossing over that (when allocating 16 PCIe lanes to a GPU as per your example), most of the remaining I/O connectivity comes from the chipset, not directly from the CPU itself?
There'll still be bandwidth limitations, of course, as you'll only be able to max out the bandwidth of the link (which in this case is 4x PCIe 4.0 lanes), but this implies that it's not only okay but normal to implement designs that don't support maximum theoretical bandwidth being used by all available ports and so we don't need to allocate PCIe lanes <-> USB ports as stringently as your example calculations require.
Note to other readers (I assume OP already knows): PCIe lane bandwidth doubles/halves when going up/down one generation respectively. So 4x PCIe 4.0 lanes are equivalent in maximum bandwidth to 2x PCIe 5.0 lanes, or 8x PCIe 3.0 lanes.
edit: clarified what I meant about the 16 "GPU-assigned" lanes.
Typically no, the top two PCIE x16 slots are normally directly to the CPU, though when both are plugged in they will drop down to both being x8 connectivity.
Any PCIE x4 or X1 are off the chipset, as well as some IO, and any third or fourth x16 slots.
So yes, motherboards typically do implement more IO connectivity than can be used simultaneously, though they will try to avoid disabling USB ports or dropping their speed since regular customers will not understand why.
I think the relevant part of my original comment might've been misunderstood -- I'll edit to clarify that but I'm already aware that the 16 "GPU-assigned" lanes are coming directly from the CPU (including when doing 2x8, if the board is designed in this way -- the GPU-assigned lanes aren't what I'm getting at here).
This doesn't really address what I was getting at though. The OP's point was basically "the reason there isn't more USB is because there's not enough bandwidth - here are the numbers". The missing bandwidth they're mentioning is correct, but the reality is that we already design boards with more ports than bandwidth - hence why it doesn't seem like a great answer despite being a helpful addition to the discussion.